Implementation of LZRW3 data compression algorithm.
Project tag: xup5
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The goal of this project was to implement an interactive embedded system, based on MicroBlaze processor and Linux OS, interacting with user through a PS2 keyboard and using an LCD screen as an output. -
Implementation of Out-of-Order execution engine on the base of OpenRISC architecture. -
The goal of the project is to build a multicore system based on the OpenRISC architecture, and implement it on Xilinx XUPV5 (aka ML509) board. -
Infrastructure design & implementation of MIPS processors for students lab - based on Bluespec HDL -
Implementing Pipelined MIPS processor using Bluespec System Verilog, and run it on FPGA. -
Independent system connected to the Internet that can transfer data and control from and to a PC and store large amount of data transferred from a PC on the DDR. -
The project goal is designing high speed decompression core and assemble its periphery units using VHDL language so it could be properly implemented on an FPGA.