The FPGA Based Calculator Core Project main goal is to implement a calculator for simple algebraic calculations, using hardware.
Project tag: wishbone
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Automatically generates registers according to a required specification using a smart interface. -
The project implemented Internal Logic Analyzer, a checking device which assist debugging the FPGA card. The device is independent in the manufacturer of the card. The project was written in VHDL code. Both entering data into the system and extracting it are according to UART protocol. In the system there is a possibility for the user to define the depth and the width of the recorded data as he wishes,... -
A Picture In Picture is an additional video\picture data placed in a main video data frame, by using FPGA. -
Implementation of mini digital scope. User can determine the pre and post trigger, trigger level, how many sequential times user want to find the trigger. Using the wishbone protocol for communication between different system blocks.