The FPGA Based Calculator Core Project main goal is to implement a calculator for simple algebraic calculations, using hardware.
This Project consists 2 main parts: a software component (host) and hardware on FPGA. The software component is a MATLAB based GUI for entering the desired calculation string, sending it to the hardware, reading the result from the hardware after calculation is done and checking that the result achieved by the hardware is a correct one. The hardware on the FPGA does the actual work of calculation once it receives the data from the host. The hardware includes a number of clients (functional hardware blocks) which handle the data: receiving/sending it from/to the host, sending data between different clients in internal communication protocol, and calculating work. The internal communication uses Wishbone protocol. Communication between the host and the hardware is done via UART protocol.