LZRW3 Data Compression Core Implementation of LZRW3 data compression algorithm. Tags: compress | compression | LZRW3 | planahead | uart | xilinx | xup5
LZRW3 Data De-Compression Core The project goal is designing high speed decompression core and assemble its periphery units using VHDL language so it could be properly implemented on an FPGA. Tags: compression | GUI | ise | LZRW3 | virtex 5 | xilinx | xup5