Project tag: vhdl

  • Picture Manipulation in Hardware

    The project implements an image processing algorithms with VHDL. The system burn on FPGA board, and supports: Full panoramic rotation: -360 to 360 degrees Zoom function- x1 to x16 Crop-Image function Minimum image distortion. Inputs - angle, zoom factor, crop coordinates, 512x512 BMP 8bit greyscale image. Output - processed 600x800 BMP 8bit greyscale image. Protocols - UART-software to hardware, WISHBONE-hardware to hardware. 
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  • Image recognition algorithm on FPGA

    Optical flow is an image processing algorithm that produces a 2D vector field of the speed of every pixel in a movie. In this project we implemented a basic optical flow algorithm in Simulink as a real time hardware system for future loading onto a FPGA. 
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  • Internal logic analyzer

    The project implemented Internal Logic Analyzer, a checking device which assist debugging the FPGA card. The device is independent in the manufacturer of the card. The project was written in VHDL code. Both entering data into the system and extracting it are according to UART protocol. In the system there is a possibility for the user to define the depth and the width of the recorded data as he wishes,...
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  • Mini digital signal scope

    Implementation of mini digital scope. User can determine the pre and post trigger, trigger level, how many sequential times user want to find the trigger. Using the wishbone protocol for communication between different system blocks.
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