Design a system capable to load program into simple CPU memory, parse commands and allow program execution and debug.
The project’s goal is to develop a system for controlling a simple processor, allowing the loading of a program into the processor’s memory, and starting or stopping its execution.
To achieve this goal, a set of commands have been defined through which information in the processor’s memory can be controlled.
These commands allow for reading, writing, and changing the memory pointer at any given time.
In addition, communication in the system will be based on the UART communication protocol and will support two different frequencies.
The communication will allow for receiving commands from the user and returning a response after execution.
This project includes all development stages, starting from the system architecture and solution definition, in which the system is diagrammed in detailed block diagrams, to the implementation of the system in the System-Verilog hardware language, testing on the Modelsim simulation and implementing the code on an FPGA to obtain a working and functioning system as defined.
