An FPGA project the aims to make the FPGA tests its own components and try to detect faults in the FPGA.
For each components it's a different testing method in order to check whether the component is working as expected or not.
This project is concentrated on developing a method to check the functionality, and correctness, of the different components of the FPGA:
PLL&Eternal Memory
In this project we checked two components of the FPGA, the PLL (Phased-Locked Loops) and the External memory.
The tests were made so the FPGA can test itself without the need of an external test environment.
The assumption we followed throughout this project was, that an error that occurs more than once is considered to be permanent damage.
Furthermore, in this project we were looking to define the faulty area, as it is extracted from the tests.
