This project implements a high-speed digital communication channel switch. It is implemented on a Stratix II Gx SI development kit by Altera. It utilizes 4 ports and transfers 128-byte packets from port to port. It uses CRC error checking, and ALTGX physical channel.
![](https://diglab.technion.ac.il/wp-content/uploads/sites/5/2016/11/D02109.jpg)