This project implements a high-speed pulse width compression system on a controlled-impedance PCB using a delay-and-subtract architecture. Controlled via an ESP32-S3 microcontroller, the design successfully transforms wider baseline input pulses into sharp, sub-nanosecond timing spikes.
This project presents the design, simulation, and physical implementation of a high-speed pulse width compression system utilizing a delay-and-subtract architecture on a dedicated printed circuit board (PCB). Implemented with strict 50-ohm controlled-impedance microstrip routing, the system leverages an MAX3949 signal sharpener to generate aggressive rising edges and precise timing control. The core operating principle relies on routing differential signals through two distinct physical paths- a short reference trace and a longer delay line-before recombining them via passive resistive adders. The physical length difference (Δ𝐿) introduces a precise propagation delay, allowing the circuit to effectively cancel out the main pulse body and isolate sharp sub-nanosecond edges. System configuration, management, and multi-drop bus communication are centrally handled by an integrated ESP32-S3 microcontroller. Ultimately, the project successfully expands a single-channel sharpener into a versatile, multi-width sub-nanosecond pulse generator with a minimal hardware footprint, paving the way for future wireless Bluetooth integration and adaptive channel calibration.
