In this project, we emulate ultrasound data in the FPGA and send it through a loopback to the FPGA, we preprocess the data by interpolation filtering, delaying and packing to produce a low focused single beam of 128 bit. The beam data is then transferred to a host system for further processing via DMA on a PCI-express bus.
For our project we emulated real data from the Ultrasound probe by pseudo-random data generators. Out of 96 possible data sources we selected 16 at a time using a shift register and a multiplexer alike unit. Those data were generated at 200MB/s.
To account for the transfer of data from the Ultrasound probe to the processing FPGA we installed a loopback using 16 LVDS transmitters and 16 LVDS receivers at 800Gb/s DDR mode.
The received data are processed by an unpacking unit which changes the dataformat into 32 16 bit channels for the I component and 32 16 bit channels for the Q component of the original ultrasound signal. those channels are further processed at 25 MHz.
For the final transfer to the PC via PCI, the signal is repackaged 128 bit vectors which will be transfered again at 200 MHz.
To verify an errorfree transfer over the loopback cable, an additional unpackunit is installed using the same inputs as the transmitters. After synchronization the output of both unpack-unit are compared for equal data sequences.
