• The project goal is to add Wi-Fi communications capabilities for Zed-Board. The communication will be performed by GUI on remote computer to read, write, and send information from or to the board.
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  • Building an infrastructure for hardware accelerators based on FPGAs for algorithms implemented in MATLAB. Consists of 3 main parts: - C code that is invoked from a MATLAB script (MEX file). - PCIe driver that is used to transfer data to the hardware. - Basic hardware design that connect the PCIe and the DDR3 memory DIMMs on the VC709 board.