• This project explores a simple design and implementation of a Vector Processing Unit attached to a RISC-V Multi-Cycle microarchitecture core. We implemented the design on an FPGA, executed code, measured and compared performance and power on the integer-processor versus our vector-processor. The comparative evaluation showed that in the cost of quadruple the hardware, we got significant differences in favor of vector-processor, both in energy and execution time.
  • Fast communication channels have become a necessary infrastructure in any digital system. Industry defines various standards for transmitting data, one of the most important and common ones is the PCIe. The goal of the project is to design a Matlab GUI to allow the user to generate custom packets and Design a programmable data source for sending PCIe type package to a JBERT and analyze them there.
    Tags: | | |
  • In a CubeSat communication satellite which is scheduled to be launched in Q2 2020, a FPGA is used to interface some analog RF components to the PCIe bus of a processor. Up in space, the complete electronic of the satellite is subjected to a high degree of radiation. Radiation may lead to temporary or even permanent malfunction of the components e.g. the FPGA. As less than half the FPGA is...
  • This project aim was to create an infrastructure who enable the end user to create and use hardware accelerators library using INtime for Windows RTOS and NetFPGA-SUME. Hardware accelerators are created with Xilinx Partial Reconfiguration technology that gives us the ability the ability to swap accelerators at real-time without affecting other operational part of the system.
    Categories:
  • Building an infrastructure for hardware accelerators based on FPGAs for algorithms implemented in MATLAB. Consists of 3 main parts: - C code that is invoked from a MATLAB script (MEX file). - PCIe driver that is used to transfer data to the hardware. - Basic hardware design that connect the PCIe and the DDR3 memory DIMMs on the VC709 board.